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  features ? frequency range 5 ghz to 6 ghz  p out 25 dbm at 5.8 ghz  gain typically 30 db  p in typically 0 dbm  v cc 2.7v to 3.8v  power consumption in power-down mode typically < 1 a  package: qfn16 3 mm 3 mm benefits  biasing control extends battery time  simple input and output matching  only one single supply required  no high-side switching transistor required 1. description 1.1 process this 5-ghz power amplifier (pa) is desig ned using atmel?s silic on-germanium (sige) process and provides high efficiency. 1.2 circuitry the pa, atr7040, consists of a three-stage amplifier with a typical output power of 25 dbm. the output stage was implemented using an open-collector structure. power up, power down, and output level are controlled at bias control pin 6 (v ctl ). 5.8 ghz wdct power amplifier atr7040 4868c?dect?05/06
2 4868c?dect?05/06 atr7040 figure 1-1. block diagram bias control rfin 10 rfout/vcc3 2 13 vctl 15 vcc_ctl vcc1 7 atr7040 rfout/vcc3 3 matching matching vcc2 6 14 gnd paddle gnd
3 4868c?dect?05/06 atr7040 2. pin configuration figure 2-1. pinning qfn16 nc rfout/vcc3 rfout/vcc3 nc nc nc rfin nc nc vcc_ctl gnd vctl nc vcc2 vcc1 nc 16 15 14 13 5 6 7 8 1 2 3 4 12 11 10 9 gnd on the paddle atr7040 table 2-1. pin description pin symbol function 1 nc not connected (1) 2 rfout rf output and supply voltage for output amplifier stage 3 rfout rf output and supply voltage for output amplifier stage 4 nc not connected (1) 5 nc not connected (1) 6 vcc2 supply voltage for second amplifier stage 7 vcc1 supply voltage for first amplifier stage 8 nc not connected (1) 9 nc not connected (1) 10 rfin rf input 11 nc not connected (1) 12 nc not connected (1) 13 vctl control voltage for power ramping 14 gnd ground 15 vcc_ctl supply voltage for biasing control block 16 nc not connected (1) paddle ? ground note: 1. pin can be connected to paddle for increased gnd area
4 4868c?dect?05/06 atr7040 electrostatic sensitive device. observe precautions for handling. 3. absolute maximum ratings stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond t hose indicated in the operational sections of this specification is not implied. exposure to absolute maximum rati ng conditions for extended periods may affect device reliability . parameters symbol value unit supply voltage v cc 5v supply current i cc 400 ma junction temperature t j 150 c storage temperature t stg ?40 to +125 c input rf power p in 10 dbm control voltage v ctl 2.5 v note: the part may not survive all maximums applied simultaneously. 4. thermal resistance parameters symbol value unit junction ambient package qfn16, 3 3, slug soldered on pcb r thja 40 k/w 5. operating range parameters symbol value unit supply voltage v cc 2.7 to 3.8 v operating frequency range f in 5100 to 5900 mhz ambient temperature range t amb ?25 to +75 c
5 4868c?dect?05/06 atr7040 7. application circuit figure 7-1. application circuit 6. electrical characteristics operating conditions: v cc = 3.6v, v ctl = 1.5v, input frequency = 5.8 ghz, input power 0 dbm, pulsed mode, duty cycle 10%, t on = 1 ms, t amb = 25c, unless otherwise specified. no. parameters test conditio ns pin symbol min. typ. max. unit 1.0 frequency range depends on external circuitry 5100 5900 mhz 1.1 supply voltage v cc 2.7 3.6 3.8 v 1.2 input power p in 0dbm 1.3 saturated power output p sat 25 dbm 1.4 output power deviation p d ?2 +2 db 1.5 control voltage range pa operating mode v ctl 1.0 1.7 v power-down mode v ctl 0.2 v 1.6 control input current pa on 5 i ctl 90 a 1.7 input return loss with external matching 10 ?7 ?6 db 1.8 isolation v ctl 0.2v iso r 33 35 db 1.9 power added efficiency at power saturation, p in =0dbm pa e 3 5 % 1.10 current consumption for 25 dbm output power i cc 250 ma 1.11 current consumption in power-down mode v ctl 0.2v i cc 1a 1.12 duty cycle of operation at saturated output power 100 % c1 8 4 1 2 3 9 12 11 10 765 13 14 15 16 vcc vctl vcc slug l1 c3 c6 rfou t rfin trl2 trl1 c2
6 4868c?dect?05/06 atr7040 8. diagrams figure 8-1. output power, efficiency and supply currents versus input frequency figure 8-2. output power, gain, efficiency and supply currents versus input power figure 8-3. output power, efficiency and supply currents versus operating voltage 10 15 20 25 30 35 40 56 0 0 56 50 570 0 5750 58 0 0 58 50 59 0 0 59 50 6000 frequency (mhz) p out (dbm), pae % 0 50 10 0 15 0 200 250 300 350 400 i ges (ma) p in = 0 dbm, v cc = 3.6v, v ctl = 1.4v pae (%) i ges (ma) p out (dbm) -30 -20 -10 0 10 20 30 40 -20 -15 -10 -5 0 5 p in (dbm) p out (dbm), gain (db), pae (%) 0 50 10 0 15 0 200 250 300 350 400 p out (dbm) i ges (ma) i ges (ma) freq = 5800 mhz, v cc = 3.6v, v ctl = 1.4v pae (%) gain (db) v cc (v) p out (dbm), pae (%) i ges (ma) freq = 5800 mhz, p in = 0 dbm, v ctl = 1.5v 10 15 20 25 30 35 40 2.5 3.0 3.5 4.0 0 50 10 0 15 0 200 250 300 350 400 450 pae (%) p out (dbm) i ges (ma)
7 4868c?dect?05/06 atr7040 10. package information 9. ordering information extended type number package remarks ATR7040-PVPG qfn16, 3 3 taped and reeled, moq 2000, pb-free atr7040-pvqg qfn16, 3 3 taped and reeled, moq 8000, pb-free 1 4 16 0.25 3 1.7 16 13 12 1 5 8 0.4 0.1 0.9 0.1 0.05 0.5 nom. 1.5 +0 -0.05 2.68 0.15 specifications according to din technical drawings not indicated tolerances 0.05 dimensions in mm package: qfn 16 - 3x3 exposed pad 1.7x1.7 (acc. jedec outline no. mo-220) drawing-no.: 6.543-5115.01-4 issue: 1; 07.03.05 assembly chip pac 94
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